Denon DN-S3500 Service Manual download pdf (Page 12)

DN-S3500

30 OSCI OSCI I - - - - Oscillation input terninal 32.0MHz

31 OSCO OSCO O - - - - Oscillation output terninal

32 VSS VSS - - - - - GND

33 P57,BOSC DR_/W O - - H - DN7000X: DSP interface send/receive select signal

34 PC5,NMI_ NMI I - - - - Connect to power

35 RST_ RST_ I - - - - Micro-processor RESET

36 PC0 FPLAY1 I - (Pu) H H MAIN fader start PLAY input

37 P76 FCUE1 I - (Pu) H H MAIN fader start CUE input

38 P60,IRQ0 DTIME I - iPu H -

X2;clock interrupt in for play/X1;LRCK :used for time code make

out when MP3 play

39 P61,IRQ1 BLKCK I - iPu - - Sub-code clock interrupt

40 P62,IRQ2,TM10IOA TABLE I - (Pu) - - Pulse width measure input for turntable

41 P63,IRQ3,TM10IOB DBCLK I - - - - Pulse width measure clock input (5.6MHz) for DISC

42 P64,IRQ4 DTIMES I - iPu H - X2;clock interrupt input for sampler play/X1

43 P65,IRQ5,TM12IOA DISCA I - - - - Pulse width measure input for scratch DISC

44 P66,IRQ6 DISCDIR I - (Pu) - - Scratch DISC turn direction detect interrupt input

45 P67,IRQ7 DQSY I - iPu - - CD-TEXT DQSY interrupt

46 P70,TM13IOB DISCPA I - (Pu) H H Pulse A count input for scratch DISC

47 P71 ML O - iPu - - D/A interface latch 2 lines common

48 PD2,DMAACK0_ CHGOFT O - - L - Off track signal (transistor drive)

49 PD3,TM3IO DISCPA_ I - - - - Pulse A inverse count input for scratch DISC

50 VDD VDD - - - - - Power (+3.3V)

51 P77 DSTBY_ O - Pd L L Driver standby signal Çk: standby

52 P72,TM14IOB DISCPB I - - - - Pulse B count input for scratch DISC

53 P73,TM11I0B DISCINT I - (Pu) - - DISC rotation start interrupt input

54 P74 MLD O - - H - Servo DSP interface latch

55 P75§TM12IOB DBCLK I - - - - Pulse width measure clock input (5.6MHz) for DISC

56 PA0,SBI0 STAT I - iPu - - Servo DSP interface receive (clock synchronous)

57 PA1,SBO0 MDAT O - - H - Servo DSP interface send (clock synchronous)

58 PA2,SBT0 MCLK O - - H - Servo DSP interface clock (clock synchronous)

59 PA3,SBI1 RXDM I - (Pu) - - Interface receive with Memo link SET (asynchronous)

60 PA4,SBO1 TXDM O - Pu H H Interface receive with Memo link SET (asynchronous)

61 PA5,SBT1 NRES_ O - Pd L L Peripheral IC reset signal

62 PB0,SBI2 DSPRXD I - Pu - H DSP interface receive (asynchronous)

63 PB1,SBO2 DSPTXD O - Pu H H DSP interface send (asynchronous)

64 PB2,SBT2 FLCS_ O - - H - FLT driver enable signal

65 PB3,SBI3 FLRES_ O - Pd L L FLT driver reset signal

66 PB4,SBO3 PDATA O - - H - FLT driver data, and LED driver data (clock synchronous)

67 PB5,SBT3 FLCLK O - - H - FLT driver data send clock (clock synchronous)

68 VDD VDD - - - - - Power (+3.3V)

69 VSS VSS - - - - - GND

70 AVSS AVSS - - - - - Analog standard GND for AD conversion

71 Vref- Vref- - - - - - Analog standard voltage for AD conversion

72 P80 O - Pd L L Not used

73 P81 O - - H - Not used

74 P82 O - - H - Not used

75 P83 SEL_A O - - L - Key scan out select signal A

76 P84 SEL_B O - - L - Key scan out select signal B

77 P85 SEL_C O - - L - Key scan out select signal C

78 P86,AD06 PITCH I - - - - Slide VR data input for pitch

79 P87,AD07 PITCHC I - - - - Slide VR center value data input for pitch

80 PD4 SEL_D O - Pu H H Key scan out select signal D

81 PD5 I - Pu (H) H Not used

82 P90 I - Pu (H) H Not used

83 P91 MSTART O - Pd L L MOTOR START/STOP H: MOTOR START

84 P92 MDIR O - - H - MOTOR turn direction select H: forward

No.

Pin Name Symbol I/O DET Ext Ini Res Function

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 59 60

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Denon DN-S3500 Service Manual Page 12

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